1. Introduction

• How to design complex electronic systems at high levels of abstraction

• specification and modeling of hybrid, mixed hw/sw solutions for embedded systems

• optimized partitioning for application graphs in HS and SW groupings

  • including their binding to processing entities

• scheduling, estimation and evaluation of design quality

• target architectures and prototyping platforms for HW/SW systems

• complexity in systems rapidly increases

• -> diversity of functions

• -> performance requirements

• -> eroding cost

• -> shorter development cycles

• application specific and

• information processing system

• which is embedded into a bigger technical context or technical system

• cooperating, optimized hardware and software components

• no their tasks differ substantially from general purpose computing systems

• reliability

• availability

• serviceability

• the failuer of an embedded system

• has no catastrophic consequences

• for the technical context or higher order system

• from the beginning

• -> have to be designed into the system from the very beginning

• yes

• -> when e.g. assumptions on worklad and root cause of failuers

• -> turn out to be inadequate or even wrong…

• R(t)

• probability taht a system works correct until time t

• assumed it worked correct at a reference time t0=0

calculation:

• assuming a constant failure rate lambda

• metric based on failure rate lambda

• the fraction of time the system works between two consecutive failures

• mean time to failure / (MTTF + mean time to repair)

-> assuming the non-avaiable time is MTTR and the available is MTTF

-> MTTF fraction of it…

• measure considering the time it takes to repair a system

• after a benign failure

• => MTTR

• early “infant mortality” failure

  • decreases over time

• constant (random) failure

  • constant

• wear out failures

  • increases over time

• compoise the different failure types

• -> in the middle, there is “sweetspot” of constant failure we assume…

• efficiency

• real-time capability

• flexibility (by means of freely programmable CPU components)

• cost

• energy

• execution time

• weight

• area

• code size

• => often multi-dimensional optimzation targets

• implies that

• system reacts to external stimuli from environment (techn. context)

• within a predefined time interval

• non-compliance to hard real-time condition

• may lead to system failure

• risk minimization

• time-to-market

• post-shipment upgrades

• express compute operations per area and time

• ops / N [L_min^2]

• empiric metric that expresses

• number of elementary operations of a compute entity

• which can be changed instantaneously

• => i.e. flexibility…

• Custom Logic / ASIC

  • paralell in space and time

• Pipelined RISC

  • paralell in space

  • sequential in time

• software: more flexibility

• hardware: more computational density and power efficiency

• doubling of chip capacity every 2 – 3 years

• ability to integrate more diversified functoins on single chip

• exponential cost reduction

• higher complexity -> how to test such systems with affordable cost and time

• how to cope with power dissipation

• holistic consideration and design of hardware and software components of an (embedded) system

• with the objective to

1. improve quality of design

   1. cost reduction

   2. shorter development cycle

2. optimize performance

   1. lower processing latency

   2. higher system throughput

• and design at high abstraction levels

  • -> design start with formal, implementation independent application modeling

• system (i.e. network of communicating sub-systems)

• architecture / module

  • HW: processors, ASICS, Buses, I/O,…

  •