What are approaches to achieve VLSI (very large scale integration) of chips?
large dies
simply put more transistors on
2.5D integration chiplts
combine several dies with silicon interposer
3D packaging
entier dies stacked and communicate via off-chip connetions
3D stacking
connect dies with ?through silicon vias
Monolithic 3D ICs
use multiple layers of silicon on top of a single substrate
What are the driving forces behind the advances of CPU?
increase in transistor due to imrovements in process (manufacturing) technology
increase in clock speed (stopped)
need for performance increase
need for energy reduction
What are trends in CPU?
multi-core processors
parallelism
SIMD support (single instrution multiple data)
computatoin on vectors rather than individual scalars
Combination of core private and shared caches
heterogeneity
add variety of specialized components
i.e. crypto stuff….
hardware support for energy control
64 bit architectures
What is a challenge CPU face?
memory hierarchy
providing requried data fast enough
What cache levels are there in skylake (fast to slow)?
L1l cache
L1D
Zuletzt geändertvor 2 Jahren