AND
AND the memory operand with AC (primary opcode)
TAD
Two's complement ADD to AC with carry in L (primary opcode)
ISZ
increment memory operand and skip next instruction if result is zero (primary opcode)
DCA
deposit accumulator into memory operand and clear AC (primary opcode)
JMS
Jump to subroutine (storing return address in first word of subroutine) (primary opcode)
JMP
jump jump jump jump jump (primary opcode)
IOT
Input/Output Transfer (primary opcode)
OPR
microcode operations (primary opcode)
CLA
clear accumulator (group 1 / group 2 / group 3 microcode)
CLL
clear L bit (group 1 microcode)
CMA
complement accumulator (group 1 microcode)
CML
complement L bit (group 1 microcode)
IAC
increment accumulator (group 1 microcode)
RAR
rotate right (group 1 microcode)
RAL
rotate left (group 1 microcode)
RTR
rotate right twice (group 1 microcode)
RTL
rotate left twice (group 1 microcode)
BSW
byte swap 6-bit bytes (group 1 microcode / 8/e and up)
SMA
Skip on AC (OR group) (group 2 microcode)
SZA
Skip on AC equal to zero (OR group) (group 2 microcode)
SNL
Skip on L equal to zero (OR group) (group 2 microcode)
OSR
Logically OR front panel switches into AC (group 2 microcode)
HLT
Halt (group 2 microcode)
SKP
Skip unconditionally (AND group) (group 2 microcode)
SPA
Skip on AC >= 0 (AND group) (group 2 microcode)
SNA
Skip on AC != 0 (AND group) (group 2 microcode)
SZL
Ski-p on L == 0 (AND groupO (group 2 microcode)
MQA
Multiplier quotient with AC (logical or MQ into AC) (group 3 microcode)
SCA
Step counter load into AC (group 3 microcode)
MQL
Multiplier quotient Load (transfer AC to MQ and clear AC) (group 3 microcode)
CAM
CLA + MQL clears both AC and MQ (group 3 microcode)
EAE
Extened arithmetic element (not an opcode)
MQ
Multiplier / Quotient register (EAE required)
SCL
Step Counter Load (immediate word follows / 8/I and above) into EAE step counter to control loop counts for hardware-accelerated shift/multiply/divide
MUY
Multiply (EAE required)
DVI
Divide (EAE required)
NMI
Normalize (EAE required)
SHL
Shift-left (immediate word follows (EAE required)
ASR
Arithmetic shift right (EAE required)
LSR
Logical shift right (EAE required)
CIA
abbreviation of CMA and IAC to two's complement AC
NOP
No operation (group 1 microcode with no instructions)
Zuletzt geändertvor 12 Tagen