BCC
Branch on
Carry Clear
a.k.a. Register is LESS THAN value
BCS
Branch on Carry Set
Register is GREATER THAN OR EQUAL to value
BEQ
Branch on equal
a.k.a. zero flag set
BMI
Branch on Minus
a.k.a. negative flag set
BNE
Branch on not equl
a.k.a. zero flag cleared
BPL
Branch on plus
a.k.a. negative flag clear
BVC
Branch on overflow clear
BVS
Branch on overflow set
ADC
Add with carry
Accumulator + operand + carry
Want to CLC before doing multi-byte add.
Can change: C Z V N
AND
logical (bitwise) And (with accumulator)
Can change: Z N
ASL
Arithmetic shift left.
shift bits of accumulator memory one to the left (a.k.a. multiply by two), shifting in a zero
high bit shifted in to C (a.k.a. if multiplying by two, the result will not fit into 8 bits)
BIT
Bit test
Take the operand. Use the accumulator as a mask pattern. Use that to test the operand (zero page or absolute). AND the mask with memory to set the flags. N is set based on bit 7, and V on bit 6. no value is modified
Can change: Z, V, N
BRK
Force interrupt
PC and Processor status pushed on stack.
IRQ interrupt vector at $FFFE is loaded into the PC and break flag in status word is set
Can change: B
CLC
clear carry flag
Use this before doing an add so that stale carry bits won’t affect the addition
CLD
clear decimal mode. Go back to two’s complement math
Clears D
CLI
clear interrupt Disable - allows normal interrupt requests to be serviced
Clears I
CLV
Clear overflow flag
Clears V
CMP
compare opcode with accumulator (A - M)
Carry set if A >= M
Zero set if A = M
Negative set to bit seven of the subtraction
Can change: Z C N
CPX
compare opcode with X register (X - M)
Carry set if X >= M
Zero set if X = M
CPY
compare opcode with Y register (Y - M)
Carry set if Y >= M
Zero set if Y = M
DEC
Decrement memory
DEX
Decrement X register
DEY
Decrement Y register
EOR
Exclusive-OR accumulator with operand
INC
Increment memory operand
INX
Increment X register
INY
Increment Y register
JMP
jump jump jump jump
JSR
Jump to Subroutine
Pushes address (minus one) of the return point onto the stack, then sets the PC to the target.
The minus-one address is the last byte of the JSR,
Absolute address is the only allowed addressing mode
Paired with RTS to return (which will add one to the address to compensate for the minus one)
LDA
Load Accumulator from operand
LDX
Load X register from operand
LSR
Logical Shift Right.
Shift the bits in the operand to the right. zero bit moved to C, Bit 7 cleared
Can change: C Z N
NOP
no operation
ORA
Logical bitwise “inclusive” OR into accumulator from operand
PHA
Push Accumulator on to the stack
PHP
Push status flags on to the stack
PLA
Pull 8 bit value from the stack and put into the accumulator
PLP
Pull 8 bit value from the tack and into the processor flags.
Can change: all of them
ROL
Rotate Left
Move bits in the accumulator to the left. Carry gets shifted into bit zero. Bit 7 gets shifted into Carry
ROR
Move bits in the accumulator to the right Carry gets shifted into bit seven. Bit 0 gets shifted into Carry
RTI
Return from Interrupt - pulls processor flags from the stack, followed by program counter.
There is no Minus-one offset for this address, like JSR/RTS do
RTS
Return from Subroutine
Usually paired with JSR
Pulls the program counter from the stack, adds one, then puts into PC
SBC
Subtract with Carry
Subtract the operand from the accumulator with the NOT of the carry bit.
Overflow clears carry bit
Always set the carry before doing multi-byte subtraction
A = A - M-(1-C)
V set if sign is incorrect
Can change: C Z V
SEC
Set Carry Flag
SED
Set Decimal Flag
We now be doing BCD math
SEI
Set Interrupt Disable
Sets the disable flag, so maskable interrupts can’t happen
STA
Store accumulator into memory
STX
Store X register into memory
STY
Store Y register into memory
TAX
transfer accumulator to X register
TAY
transfer accumulator to Y register
TSX
transfer stack pointer to X register
TXA
transfer X register to accumulator
Can change: N Z
TXS
transfer X register to stack pointer
TYA
transfer Y to accumulator
Can set N Z
What branch for <
What branch for >=
What branch for ==
What branch for !=
What are the processor status flags?
C Carry Z Zero I Interrupt Disable D Decimal mode B Break command V Overflow N Negative
What addressing mode is ***,X
X register indexed absolute addressing. Take the 16 address from the operand and add X register
What addressing mode is ***,Y
Y register indexed absolute addressing. Take the 16 address from the operand and add Y register
What addressing mode is JMP ($1234)
Indirect. Go to the address indicated, use the two bytes there as an address to jump to JMP is the only instruction that can do it.
What addressing mode is LDA ($40,X)
Indexed Indirect. Take the zero-page address as the base of a table of pointers. Use X to find the X'th item. Then grab the two bytes there to use as an address. X is the only register that can be used for this
What addressing mode is LDA ($40),Y
Indirect Indexed. One of the most common indirect addressing modes. A zero-page location has a 16-bit address. Take that, then add Y. Y is the only register that can be used for this.
What is the RTS JMP trick?
A way of faking an indirect JMP by explicitly pushing an address (minus one) on the stack, then calling RTS
LDY
Load Y register from operand Can change: Z N
Carry flag and subtraction
Carry flag is an INVERTED borrow. If set, no borrow was done previously. If clear, a borrow did happen
Thats why you do a SEC before a subtraction (SBC)
Carry flag and CMP
The carry flag is an INVERTED borrow. When doing the CMP (acc - operand), if a borrow DID happen happened, the carry is CLEARED
So, acc - operand is carry CLEAR, a borrow HAPPENED. Means acc < operand
If carry is SET, a borrow did NOT happen. Which means acc >= operand
Last changed2 days ago